Hardware Schematic Description.pdf

Below is a block diagram of the IF DIGITIZER board. The analog input comes into the SMA connector.
The signal is filtered, and then sent into an Automatic Gain Controller (AGC) to maintain constant levels.
Then the analog signal is sampled via an A/D converter. The digital samples are then fed into an FPGA
chip. The FPGA chip downconverts the signal from IF (Intermediate Frequency of 140 MHz) to baseband
(0 Hz) using the digital multiplier. After that, the FPGA decimates the signal by M (throws away samples
and low pass filters it), and sends the samples out to a USB port for further processing. All of the chips
are commercially available.Next...